IJCCE 2013 Vol.2(5): 557-559 ISSN: 2010-3743
DOI: 10.7763/IJCCE.2013.V2.248
DOI: 10.7763/IJCCE.2013.V2.248
An Algorithm for Variable Cache Ways
S. Subha
Abstract—Cache ways are fixed in traditional caches. This paper proposes an algorithm to have variable number of ways in set associative caches. The cache is assumed to be fast registers. A free register to a set is allocated on cold miss. The least recently used policy is used to replace a way in case of no free registers. This algorithm results in variable number of ways for mapped sets. Simulations were performed with SPEC2K benchmarks on the proposed model. An improvement of 3% is seen in average memory access time.
Index Terms—Average memory access time, set associative cache, variable ways.
S. Subha is with Vellore Institute of Technology, Vellore, T.N, 632014 India(email:ssubha@rocketmail.com).
Index Terms—Average memory access time, set associative cache, variable ways.
S. Subha is with Vellore Institute of Technology, Vellore, T.N, 632014 India(email:ssubha@rocketmail.com).
Cite:S. Subha, "An Algorithm for Variable Cache Ways," International Journal of Computer and Communication Engineering vol. 2, no. 5, pp. 557-559, 2013.
General Information
ISSN: 2010-3743 (Online)
Abbreviated Title: Int. J. Comput. Commun. Eng.
Frequency: Quarterly
DOI: 10.17706/IJCCE
Editor-in-Chief: Dr. Maode Ma
Abstracting/ Indexing: INSPEC, CNKI, Google Scholar, Crossref, EBSCO, ProQuest, and Electronic Journals Library
E-mail: ijcce@iap.org
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